Software Development

Build Sequential Circuit

Build sequential (stateful) logic circuits including latches, flip-flops, registers, counters, and finite state machines. Covers SR latch, D and JK flip-flops, binary/BCD/ring counters, and Mealy/Moore FSM design with clock signal and timing analysis. Use when a circuit must remember past inputs, count events, or implement a state-dependent control sequence.

Publisher / source

pjt222/agent-almanac (found on the CSV list)

Upstream record

pjt222/agent-almanac

Version

Version 1

Published

2026-11-03

Publication review

Approved for publication · recorded passed scan 2026-11-03

Content fingerprint

30c5c65fad68c71a332dc39d0902f666cc1e8673fe946eb2fd2169636bffc42c